1. Technical Field
The inventive concept relates to a semiconductor integration circuit device, and, more particularly, to a three-dimensional (3D) semiconductor device, a variable resistive memory device including the same, and a method of manufacturing the same.
2. Related Art
With the rapid development of mobile and digital information communication and consumer-electronic industries, studies on existing electronic charged-controlled devices may encounter limitations. Thus, new and novel functional memory devices other than the existing electronic charged-controlled devices need to be developed. In particular, next-generation memory devices with large capacity, ultra-high speed, and ultra-low power need to be developed to satisfy demands on large capacity of memories in main information apparatuses.
Currently, variable resistive memory devices using a resistance device as a memory medium have been suggested as the next-generation memory devices. Examples of the variable resistive memory devices are phase-change random access memories (PCRAMs), resistance RAMs (ReRAMs), and magneto-resistive RAMs (MRAMs).
Each of the variable resistive memory devices may be formed of a switching device and a resistance device, and may store data “0” or “1” according to a state of the resistance device.
Even in the variable resistive memory devices, a priority is to improve its integration density, that is, to integrate as many memory cells as possible in a limited small area.
To satisfy the priority, the variable resistive memory device employs a three-dimensional (3D) transistor. The 3D transistor is a transistor in which a channel is formed to be perpendicular to a surface of a semiconductor substrate.
D transistor requires a thin gate insulating layer as well. Thus, when a high voltage is supplied to a gate of the 3D transistor, a relatively high electric field is applied to a lightly doped drain (LDD) overlapping the gate, thereby causing gate-induced drain leakage (GIDL).